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<div class="title">xpciepsu_hw.h File Reference</div>  </div>
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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
<div class="textblock"><p>This header file contains identifiers and basic driver functions for the XPciePsu device driver. </p>
<pre>
MODIFICATION HISTORY:</pre><pre>Ver   Who  Date     Changes
</p>
<hr/>
<p>
1.0     bs      08/21/2018      First release
</pre> </div><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr><td colspan="2"><div class="groupHeader">Registers</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>Register offsets for this device.</p>
<p>Some of the registers are configurable at hardware build time such that may or may not exist in the hardware. </p>
</div></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MSGF_MISC_SR_RXMSG_OVER</b>&#160;&#160;&#160;BIT(1U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MSGF_LEG_SR_INTB</b>&#160;&#160;&#160;BIT(1U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MSGF_LEG_SR_INTC</b>&#160;&#160;&#160;BIT(2U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MSGF_LEG_SR_INTD</b>&#160;&#160;&#160;BIT(3U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MSGF_LEG_SR_MASKALL</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>BREG_PRESENT</b>&#160;&#160;&#160;BIT(0U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>BREG_ENABLE</b>&#160;&#160;&#160;BIT(0U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>BREG_ENABLE_FORCE</b>&#160;&#160;&#160;BIT(1U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>E_ECAM_PRESENT</b>&#160;&#160;&#160;BIT(0U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>E_ECAM_CR_ENABLE</b>&#160;&#160;&#160;BIT(0U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>E_ECAM_SIZE_LOC</b>&#160;&#160;&#160;GENMASK(20U, 16U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>E_ECAM_SIZE_MIN</b>&#160;&#160;&#160;GENMASK(23U, 16U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>E_ECAM_SIZE_SHIFT</b>&#160;&#160;&#160;16U</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PSU_ECAM_VALUE_DEFAULT</b>&#160;&#160;&#160;12U</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CFG_DMA_REG_BAR</b>&#160;&#160;&#160;GENMASK(2U, 0U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XPCIEPSU_PS_LINKUP_OFFSET</b>&#160;&#160;&#160;0x00000238U</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XPCIEPSU_PHY_LINKUP_BIT</b>&#160;&#160;&#160;BIT(0U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XPCIEPSU_XPHY_RDY_LINKUP_BIT</b>&#160;&#160;&#160;BIT(1U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XPCIEPSU_LINK_WAIT_MAX_RETRIES</b>&#160;&#160;&#160;10U</td></tr>
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<tr class="memitem:a799026f5319efdddaa150c8bb842c1b2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a799026f5319efdddaa150c8bb842c1b2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XPCIEPSU_LINK_WAIT_USLEEP_MIN</b>&#160;&#160;&#160;90000U</td></tr>
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<tr><td colspan="2"><div class="groupHeader">ECAM Address Register bitmaps and masks</div></td></tr>
<tr class="memitem:a1f631e0208927a2a67ceade471bba3bc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xpciepsu__hw_8h.html#a1f631e0208927a2a67ceade471bba3bc">XPCIEPSU_ECAM_MASK</a>&#160;&#160;&#160;0x0FFFFFFFU</td></tr>
<tr class="memdesc:a1f631e0208927a2a67ceade471bba3bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask of all valid bits.  <a href="#a1f631e0208927a2a67ceade471bba3bc">More...</a><br/></td></tr>
<tr class="separator:a1f631e0208927a2a67ceade471bba3bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a20a45b167585637a9c235ff5b012ca09"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xpciepsu__hw_8h.html#a20a45b167585637a9c235ff5b012ca09">XPCIEPSU_ECAM_BUS_MASK</a>&#160;&#160;&#160;0x0FF00000U</td></tr>
<tr class="memdesc:a20a45b167585637a9c235ff5b012ca09"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus Number Mask.  <a href="#a20a45b167585637a9c235ff5b012ca09">More...</a><br/></td></tr>
<tr class="separator:a20a45b167585637a9c235ff5b012ca09"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a025cd22e68482e510c64559acafb2b7a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xpciepsu__hw_8h.html#a025cd22e68482e510c64559acafb2b7a">XPCIEPSU_ECAM_DEV_MASK</a>&#160;&#160;&#160;0x000F8000U</td></tr>
<tr class="memdesc:a025cd22e68482e510c64559acafb2b7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device Number Mask.  <a href="#a025cd22e68482e510c64559acafb2b7a">More...</a><br/></td></tr>
<tr class="separator:a025cd22e68482e510c64559acafb2b7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad49fa35e338b4835db5b768e05377a94"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xpciepsu__hw_8h.html#ad49fa35e338b4835db5b768e05377a94">XPCIEPSU_ECAM_FUN_MASK</a>&#160;&#160;&#160;0x00007000U</td></tr>
<tr class="memdesc:ad49fa35e338b4835db5b768e05377a94"><td class="mdescLeft">&#160;</td><td class="mdescRight">Function Number Mask.  <a href="#ad49fa35e338b4835db5b768e05377a94">More...</a><br/></td></tr>
<tr class="separator:ad49fa35e338b4835db5b768e05377a94"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad790db72820f81029d65b4d420e05742"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xpciepsu__hw_8h.html#ad790db72820f81029d65b4d420e05742">XPCIEPSU_ECAM_REG_MASK</a>&#160;&#160;&#160;0x00000FFCU</td></tr>
<tr class="memdesc:ad790db72820f81029d65b4d420e05742"><td class="mdescLeft">&#160;</td><td class="mdescRight">Register Number Mask.  <a href="#ad790db72820f81029d65b4d420e05742">More...</a><br/></td></tr>
<tr class="separator:ad790db72820f81029d65b4d420e05742"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a43e34c012ad52ea9f676bc0be12b7755"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xpciepsu__hw_8h.html#a43e34c012ad52ea9f676bc0be12b7755">XPCIEPSU_ECAM_BUS_SHIFT</a>&#160;&#160;&#160;20U</td></tr>
<tr class="memdesc:a43e34c012ad52ea9f676bc0be12b7755"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus Number Shift Value.  <a href="#a43e34c012ad52ea9f676bc0be12b7755">More...</a><br/></td></tr>
<tr class="separator:a43e34c012ad52ea9f676bc0be12b7755"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a656b4b5d6c324bb37973ad122d06e764"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xpciepsu__hw_8h.html#a656b4b5d6c324bb37973ad122d06e764">XPCIEPSU_ECAM_DEV_SHIFT</a>&#160;&#160;&#160;15U</td></tr>
<tr class="memdesc:a656b4b5d6c324bb37973ad122d06e764"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device Number Shift Value.  <a href="#a656b4b5d6c324bb37973ad122d06e764">More...</a><br/></td></tr>
<tr class="separator:a656b4b5d6c324bb37973ad122d06e764"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a70e8568f9b38b009d293beb175ad7dad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xpciepsu__hw_8h.html#a70e8568f9b38b009d293beb175ad7dad">XPCIEPSU_ECAM_FUN_SHIFT</a>&#160;&#160;&#160;12U</td></tr>
<tr class="memdesc:a70e8568f9b38b009d293beb175ad7dad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Function Number Shift Value.  <a href="#a70e8568f9b38b009d293beb175ad7dad">More...</a><br/></td></tr>
<tr class="separator:a70e8568f9b38b009d293beb175ad7dad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a37c37016f94f30ed1a242bed0ce2ba2f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xpciepsu__hw_8h.html#a37c37016f94f30ed1a242bed0ce2ba2f">XPCIEPSU_ECAM_REG_SHIFT</a>&#160;&#160;&#160;2U</td></tr>
<tr class="memdesc:a37c37016f94f30ed1a242bed0ce2ba2f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Register Number Shift Value.  <a href="#a37c37016f94f30ed1a242bed0ce2ba2f">More...</a><br/></td></tr>
<tr class="separator:a37c37016f94f30ed1a242bed0ce2ba2f"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="a20a45b167585637a9c235ff5b012ca09"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XPCIEPSU_ECAM_BUS_MASK&#160;&#160;&#160;0x0FF00000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Bus Number Mask. </p>

<p>Referenced by <a class="el" href="xpciepsu_8h.html#ac2d7bc13d9f1da8d6e67b88a1c37ed24">XPciePsu_ComposeExternalConfigAddress()</a>.</p>

</div>
</div>
<a class="anchor" id="a43e34c012ad52ea9f676bc0be12b7755"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XPCIEPSU_ECAM_BUS_SHIFT&#160;&#160;&#160;20U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Bus Number Shift Value. </p>

<p>Referenced by <a class="el" href="xpciepsu_8h.html#ac2d7bc13d9f1da8d6e67b88a1c37ed24">XPciePsu_ComposeExternalConfigAddress()</a>.</p>

</div>
</div>
<a class="anchor" id="a025cd22e68482e510c64559acafb2b7a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XPCIEPSU_ECAM_DEV_MASK&#160;&#160;&#160;0x000F8000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Device Number Mask. </p>

<p>Referenced by <a class="el" href="xpciepsu_8h.html#ac2d7bc13d9f1da8d6e67b88a1c37ed24">XPciePsu_ComposeExternalConfigAddress()</a>.</p>

</div>
</div>
<a class="anchor" id="a656b4b5d6c324bb37973ad122d06e764"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XPCIEPSU_ECAM_DEV_SHIFT&#160;&#160;&#160;15U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Device Number Shift Value. </p>

<p>Referenced by <a class="el" href="xpciepsu_8h.html#ac2d7bc13d9f1da8d6e67b88a1c37ed24">XPciePsu_ComposeExternalConfigAddress()</a>.</p>

</div>
</div>
<a class="anchor" id="ad49fa35e338b4835db5b768e05377a94"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XPCIEPSU_ECAM_FUN_MASK&#160;&#160;&#160;0x00007000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Function Number Mask. </p>

<p>Referenced by <a class="el" href="xpciepsu_8h.html#ac2d7bc13d9f1da8d6e67b88a1c37ed24">XPciePsu_ComposeExternalConfigAddress()</a>.</p>

</div>
</div>
<a class="anchor" id="a70e8568f9b38b009d293beb175ad7dad"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XPCIEPSU_ECAM_FUN_SHIFT&#160;&#160;&#160;12U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Function Number Shift Value. </p>

<p>Referenced by <a class="el" href="xpciepsu_8h.html#ac2d7bc13d9f1da8d6e67b88a1c37ed24">XPciePsu_ComposeExternalConfigAddress()</a>.</p>

</div>
</div>
<a class="anchor" id="a1f631e0208927a2a67ceade471bba3bc"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XPCIEPSU_ECAM_MASK&#160;&#160;&#160;0x0FFFFFFFU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mask of all valid bits. </p>

<p>Referenced by <a class="el" href="xpciepsu_8h.html#ac2d7bc13d9f1da8d6e67b88a1c37ed24">XPciePsu_ComposeExternalConfigAddress()</a>.</p>

</div>
</div>
<a class="anchor" id="ad790db72820f81029d65b4d420e05742"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XPCIEPSU_ECAM_REG_MASK&#160;&#160;&#160;0x00000FFCU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Register Number Mask. </p>

<p>Referenced by <a class="el" href="xpciepsu_8h.html#ac2d7bc13d9f1da8d6e67b88a1c37ed24">XPciePsu_ComposeExternalConfigAddress()</a>.</p>

</div>
</div>
<a class="anchor" id="a37c37016f94f30ed1a242bed0ce2ba2f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XPCIEPSU_ECAM_REG_SHIFT&#160;&#160;&#160;2U</td>
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      </table>
</div><div class="memdoc">

<p>Register Number Shift Value. </p>

<p>Referenced by <a class="el" href="xpciepsu_8h.html#ac2d7bc13d9f1da8d6e67b88a1c37ed24">XPciePsu_ComposeExternalConfigAddress()</a>.</p>

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